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12 Oct 2010

On the Grid-Cloud Border at CERN
CERN is an advanced HPC facility located astride the Franco-Swiss border in Geneva and interestingly, is also sharing the gray space on the border between internal grid and cloud computing, according to Sverre Jarp, CERN openlab Chief Technology Officer.

 

HPC In the Cloud

11 Oct 2010

CERN openlab: Forging Connections Between Science and IT
The Large Hadron Collider (LHC) at the European Organization for Nuclear Research (CERN) is a multidisciplinary project that has involved thousands of scientists, engineers, operations personnel, and administrators.

 

PROFIT

11 Oct 2010

When Worlds Collide - The strong bond between CERN and Oracle puts a powerful spin on physics.
Ever since Albert Einstein unveiled his general theory of relativity in 1915, physicists have attempted to devise a universal theory that can explain how all the particles and forces in the universe interact.

 

PROFIT

8 Sep 2010

CERN openlab/Intel Summer 2010 Computer Architecture and Performance Tuning Workshop 22-23 September, Geneva, Switzerland
The aim of the lectures and exercises contained in this workshop is to give the attendees a practical introduction to performance optimization and monitoring on Linux based on a good understanding of modern computer architectures.

 

ISGTW

30 Aug 2010

LHC computing grid pushes petabytes of data, beats expectations
The LHC isn't simply the most powerful particle accelerator ever created.

 

Ars Tecnica

25 Aug 2010

Intel et Nokia unis dans la 3D et les terminaux nomades
Intel, Nokia et l’université finlandaise d’Oulu inaugurent l’Intel and Nokia Joint Innovation Center dans le centre-ouest du pays.

 

Le Reporter .net

6 Jul 2010

Intel To Target 'Many-Core' Chips at Highly Parallel Applications
Intel will soon go into production with a Many Integrated Core (MIC) architecture that uses the x86 instruction set to create high-performance computing platforms running at trillions of calculations per second.

 

Campus Technology

17 Jun 2010

Intel readies MIC architecture for high-end computing
Intel revealed plans for many-core processors targeting high-end computing and claims that its Many Integrated Core architecture would help accelerate highly parallel applications.

 

EE Times India

14 Jun 2010

Intel tips plan for 50-core processor
One day after Nvidia’s Tesla chips helped China’s Nebulae supercomputer land second place on the Top 500 list, Intel announced plans for many-core processors targeting high-end computing.

 

Only Hardware Blog .com

13 Jun 2010

Intel tips plan for 50-core processor
One day after Nvidia’s Tesla chips helped China’s Nebulae supercomputer land second place on the Top 500 list, Intel announced plans for many-core processors targeting high-end computing.

EE Times

5 Jun 2010

Intel Plans Giant Co-Processor
Intel has started laying the groundwork for what it says will eventually be at least a 50-core x86 co-processor called Knights Corner based on a newfangled Many Integrated Core (MIC) architecture.

 

SOA World Magazine

4 Jun 2010

Intel’s Many Integrated Cores (MIC) announcement
Lots of interesting things were announced at the International Supercomputing Conference (ISC’10) this week.

 

Cisco Blog

2 Jun 2010

Intel Channels 'Larrabee' for HPC Processor Architecture
At the ISC 2010 show, Intel officials introduced "Knights Corner," a processing architecture aimed at the parallel computing applications inherent in the HPC field.

 

E week

2 Jun 2010

Knights Corner: Intel dévoile ses premiers processeurs à 50 coeurs
Dans le monde des supercalculateurs, la densité des puces est un élément crucial.

 

Fibladi

2 Jun 2010

Intel présente ses futurs produits pour le calcul intensif
Au cours de l’International Supercomputing Conference (ISC), la société Intel a annoncé qu’elle proposerait de nouveaux produits fondés sur l’architecture Intel® MIC (Many Integrated Cores).

 

Infohightech .com

1 Jun 2010

Intel Knights Corner: 50 core in una CPU
La nuova architettura multicore chiamata Intel Many Integrated Core (MIC) porterà un nuovo potenziale per i computer ad alte prestazioni per calcoli complessi.

 

Ampletech

1 Jun 2010

SC'10: Intel Larrabee ist da
Auf der Coprozessorkarte Knights Ferry sitzt ein Aubrey-Isle-Chip Intels Grafikprozessor Larrabee sei tot, so heißt es allgemein – aber das gilt nur für Grafikkarten.

 

C'T Magazin

1 Jun 2010

Intel Larrabee spawns “Many Integrated Core” chips
Having been proclaimed as dead, then only partially-so, Intel’s “Larrabee” project has finally sprouted into something with an eye on commercial release.

 

Slash Gear

1 Jun 2010

Intel Unveils 50-Core Supercomputing Processor
Intel has announced a new multi-core processor, and the fact that it was introduced at the International Supercomputing Conference (ISC) instead of the consumer-oriented Computex show taking place at the same time should be an indication of its target market.

 

Hardware Central

1 Jun 2010

Intel Plans Giant Co-Processor
Intel has started laying the groundwork for what it says will eventually be at least a 50-core x86 co-processor called Knights Corner based on a newfangled Many Integrated Core (MIC) architecture.

 

Java Developer's Journal (JDJ) - Sys-con Media

1 Jun 2010

Intel Unveils Plans for HPC Coprocessor
Chipmaker Intel is reviving the Larrabee technology for the HPC market, with plans to bring a manycore coprocessor to market in the next few years.

 

HPC wire

1 Jun 2010

Intel announces MIC 22nm 50+ core architecture
Last week, Intel announced to the semiconductor industry that it was scrapping plans to bring its Larrabee project to market.

 

Fudzilla

1 Jun 2010

Intel unveils many-core Knights platform for HPC
Intel has announced a new Many Integrated Core architecture for massively parallel processors, describing it as the industry's first general purpose many-core architecture.

 

ZD net

1 Jun 2010

Knights Corner: Intel dévoile ses premiers processeurs à 50 coeurs
Les puces Intel Knights Corner proposeront plus de 50 cœurs de calcul proposés sur carte PCI Express. Une solution idéale pour les supercalculateurs, car elle pourrait être relativement facile à exploiter.

 

Silicon

1 Jun 2010

Intel preps many-core 'Knights Corner' processor
Intel Corp. has said it plans to offer many-core processors targeting applications in high performance computing.

 

EE Times Europe

1 Jun 2010

Intel puts x64 in a parallel universe
We've all been wondering exactly what Intel would do with various multicore x64 processors that had been designed as co-processors to accelerate graphics and other applications with lots of number-crunching.

 

Channel Register

1 Jun 2010

Intel's Knights Corner chip targets supercomp mkt
Aiming at the growing market of supercomputers,
chip major Intel Corp announced on Monday its plans for a new class of many-core processors.

 

Cybermedia News (ciol.com)

31 May 2010

Intels Larrabee wird zum Supercomputer
Larrabee wird zwar nicht mehr als Grafikkarte erscheinen, aufgegeben wird die Architektur aber nicht. Sie wird in Teilen für Supercomputer verwendet.

 

Golem .de

31 May 2010

Intel Knights Corner, CPU con oltre 50 core a 22 nm
Dal progetto Larrabee e Single-chip Cloud Computer nasce Knights Corner, processore per supercomputer con oltre 50 core. Sarà prodotto con il processo produttivo a 22 nanometri.

Tom's hardware

31 May 2010

Intel Unveils New Product Plans for High-Performance Computing
During the International Supercomputing Conference (ISC), Intel Corporation announced plans to deliver new products based on the Intel Many Integrated Core (MIC) architecture that will create platforms running at trillions of calculations per second, while also retaining the benefits of standard Intel processors.

 

Trading - house .net

31 May 2010

Intel Unveils New Product Plans for High-Performance Computing
During the International Supercomputing Conference (ISC), Intel Corporation announced plans to deliver new products based on the Intel Many Integrated Core (MIC) architecture that will create platforms running at trillions of calculations per second, while also retaining the benefits of standard Intel processors.

 

PC Perspective

31 May 2010

Intel Knights Corner, 50 core per confermare Moore
La necessità di avere a disposizione sempre una maggiore potenza di calcolo ha portato nel corso degli ultimi anni allo sviluppo delle cosiddette soluzioni multi-core: la possibilità di unire due o più core all'interno della stessa CPU ha rappresentato un passo determinante per continuare la curva di crescita indicata da Moore nella sua tanto famosa legge.

 

Business Magazine .it

31 May 2010

Intel: nouvelle gamme de produits à hautes performances
Intel a dévoilé lundi une famille de produits capables de réaliser plusieurs trillions de calculs par seconde à l'occasion de la conférence ISC (International Supercomputing Conference) de hambourg.

 

La Tribune

31 May 2010

Intel Reshapes HPC Computing with 22nm Knights Corner Many-Core
The Larrabee might be dead but the technology that almost spawned it definitely isn't. This is what Intel confirmed today while at the International Supercomputing Conference in Hamburg, Germany

 

Softpedia

31 May 2010

Intel Knights Corner 22nm Processor Delivers 50+ CPU Cores for High-Performance Computing.

Intel Many Integrated Core Chips to Extend Intel's Role in Accelerating Science and Discovery

 

Benchmark Reviews

31 May 2010

Intel Unveils Knights Corner Accelerator for Highly-Parallel Applications.
During the International Supercomputing Conference (ISC), Intel Corporation announced plans to deliver new products based on the Intel many integrated core (MIC) architecture that will create platforms running at trillions of calculations per second, while also retaining the benefits of standard Intel processors.

 

Xbitlabs

31 May 2010

Intel Lifts Curtain on HPC Plans
Last week we detailed recent rumors that Intel was getting back into the HPC pool. 

 

Inside HPC

31 May 2010

インテル、50コア以上の「Knights Corner」開発計画を発表
Intelは、大規模な並列プロセッサ向けの新たな「Many Integrated Core」(MIC)アーキテクチャを発表した。同社によると、業界初となる汎用の複数コアアーキテクチャだという。

 

CNet Japan

31 May 2010

英特尔推出全新高性能计算产品规划
集成众核(MIC)架构的全新产品。这种架构有助于打造每秒万亿次计算的平台, 同时使用户继续享受英特尔� 至强� 处理器的优势。  英特尔计划推出的首款相关产品 (研发代号:Knights Corner) 将主要面向勘探、科学研究以及金融或气象模拟等高性能计算领域,并采用英特尔22纳米制程工艺 ―― 其集成的单个晶体管最小尺寸可达22纳米(1纳米=十亿分之一米) 。 该产品也将延续摩尔定律的推动力 ―― 将单个芯片上英特尔计算内核的集成度扩充至50个以上。鉴于绝大多数工作负载仍然能够在屡获殊荣的英特尔� 至强� 处理器上良好运行,计划推出的英特尔� 集成众核(MIC)架构则旨在帮助加速特定的高度并行化的应用。

 

Sohu .com

31 May 2010

Les futurs produits Intel pour le calcul intensif
Le fondeur Intel a pu, lors de l’International SuperComputing Conference, montrer qu’il proposerait de nouveaux produits basés sur l’architecture Intel MIC (Many Integrated Cores) pour donner naissance à des plateformes effectuant plusieurs billions de calculs par seconde tout en offrant les avantages des processeurs Intel standards.

 

IT channel .info

31 May 2010

Intel Unveils New HPC Product Plans
During the International Supercomputing Conference (ISC), Intel Corporation announced plans to deliver new products based on the Intel Many Integrated Core (MIC) architecture that will create platforms running at trillions of calculations per second, while also retaining the benefits of standard Intel processors.

 

HPC wire

31 May 2010

Intel: nouvelle gamme de produits à hautes performances
Intel a dévoilé lundi une famille de produits capables de réaliser plusieurs trillions de calculs par seconde à l'occasion de la conférence ISC (International Supercomputing Conference) de hambourg.

 

Votre Argent .fr / L'express

31 May 2010

Intel Unveils MIC Architecture Based Products For High Performance Computing - Update
Chipmaker giant Intel Corp. (INTC) Monday, during the International Supercomputing Conference, announced its plans to deliver new products based on Intel Many Integrated Core or MIC architecture that is anticipated to create platforms running at trillions of calculations per second, while also retaining the benefits of standard Intel processors.

 

RTT News / Dailymarkets .com

31 May 2010

Intel brings Many Integrated Core plans to HPC
Intel announced a new Many Integrated Core (MIC) architecture at the International Supercomputing Conference in Hamburg today.

 

Thinq .co .uk

31 May 2010

Intel Unveils New Product Plans for High-Performance Computing
Targeting high-performance computing segments such as exploration, scientific research and financial or climate simulation, the first product, codenamed “Knights Corner,” will be made on Intel's 22-nanometer manufacturing (nm) process – using transistor structures as small as 22 billionths of a meter – and will use Moore's Law to scale to more than 50 Intel processing cores on a single chip.

 

Market Watch

31 May 2010

Intel Unveils New Product Plans for High-Performance Computing
Targeting high-performance computing segments such as exploration, scientific research and financial or climate simulation, the first product, codenamed “Knights Corner,” will be made on Intel's 22-nanometer manufacturing (nm) process – using transistor structures as small as 22 billionths of a meter – and will use Moore's Law to scale to more than 50 Intel processing cores on a single chip.

 

Physorg

31 May 2010

Intel Unveils New Product Plans for High-Performance Computing
Targeting high-performance computing segments such as exploration, scientific research and financial or climate simulation, the first product, codenamed “Knights Corner,” will be made on Intel's 22-nanometer manufacturing (nm) process – using transistor structures as small as 22 billionths of a meter – and will use Moore's Law to scale to more than 50 Intel processing cores on a single chip.

 

Business Wire

31 May 2010

Intel Unveils New Product Plans for High-Performance Computing
Targeting high-performance computing segments such as exploration, scientific research and financial or climate simulation, the first product, codenamed “Knights Corner,” will be made on Intel's 22-nanometer manufacturing (nm) process – using transistor structures as small as 22 billionths of a meter – and will use Moore's Law to scale to more than 50 Intel processing cores on a single chip.

 

Herald Online

31 May 2010

Intel Unveils New Product Plans for High-Performance Computing
Targeting high-performance computing segments such as exploration, scientific research and financial or climate simulation, the first product, codenamed “Knights Corner,” will be made on Intel's 22-nanometer manufacturing (nm) process – using transistor structures as small as 22 billionths of a meter – and will use Moore's Law to scale to more than 50 Intel processing cores on a single chip.

 

PR Inside

4 May 2010

OpenLab Multi-threading and Parallelism Workshop
A fifth instance of the Multi-threading and Parallelism Workshop will be held on the 4th and 5th of May 2010 at CERN.

 

tspcern .blogspot

19 Apr 2010

Oracle Introduces Java Virtualization Solution for Oracle(R) WebLogic Suite
Oracle today announced Oracle Virtual Assembly Builder and Oracle WebLogic Suite Virtualization Option to help make running Java applications in a virtualized environment easy and practical.

 

Yahoo! Finance

19 Apr 2010

Oracle Introduces Java Virtualization Solution for Oracle(R) WebLogic Suite
Oracle today announced Oracle Virtual Assembly Builder and Oracle WebLogic Suite Virtualization Option to help make running Java applications in a virtualized environment easy and practical.

 

The Gaea Times

19 Apr 2010

Oracle Introduces Java Virtualization Solution for Oracle(R) WebLogic Suite
Oracle today announced Oracle Virtual Assembly Builder and Oracle WebLogic Suite Virtualization Option to help make running Java applications in a virtualized environment easy and practical.

 

Marketwire

19 Apr 2010

Oracle Introduces Java Virtualization Solution for Oracle(R) WebLogic Suite
Oracle today announced Oracle Virtual Assembly Builder and Oracle WebLogic Suite Virtualization Option to help make running Java applications in a virtualized environment easy and practical.

 

United Press International

10 Apr 2010

Wykład Sverre Jarp
Koło Studentów Informatyki ma zaszczyt zaprosić Wszystkich na wykład Sverre Jarp , który odbędzie się 15.04.2010 o godz. 16 w Sali wykładowej 0004 na wydziale Matematyki i Informatyki Uniwersytetu Jagiellońskiego.

 

Koło Studentów Informatyki

26 Mar 2010

The automation of the largest and fastest machine in the world
When the largest particle accelerator ever built becomes operational at CERN, the nuclear research centre in Geneva, physicists hope to gain new insight into matter and what holds it together. The accelerator and its safety will be controlled and monitored by 130 control systems featuring ‘hardened’ automation technology from Siemens.

 

Dunia Engineering Indonesia

25 Mar 2010

The automation of the largest and fastest machine in the world
When the largest particle accelerator ever built becomes operational at CERN, the nuclear research centre in Geneva, physicists hope to gain new insight into matter and what holds it together. The accelerator and its safety will be controlled and monitored by 130 control systems featuring ‘hardened’ automation technology from Siemens.

 

plc scada systems .blogspot .com

24 Mar 2010

La 14e édition d’Inforum se tient au Globe de la science et de l’innovation
La 14e édition d’Inforum se tient depuis hier au Globe de la science et de l’innovation. L’occasion pour Alp ICT de vous présenter les entreprises que le cluster soutient.

 

Blog .ALPICT .com

24 Feb 2010

Doctorat : La parallélisation des grands calculs
« S’appuyer sur la rigueur et la communauté scientifique »

 

Telecom Paris Tech

5 Feb 2010

PHYSIQUE NUCLEAIREQuand l’openlab montre la voie de la puissance
C’est désormais connu. Le CERN est le berceau du web. Mais pour traiter la masse d’informations produite par les différentes expériences des physiciens et les données générées par le désormais célèbre accélérateur LHC, l’établissement européen a dû se prévaloir d’un centre informatique au top.

 

Top - News .ch

22 Jan 2010

The automation of the largest and fastest machine in the world
When the largest particle accelerator ever built becomes operational at CERN, the nuclear research centre in Geneva, physicists hope to gain new insight into matter and what holds it together. The accelerator and its safety will be controlled and monitored by 130 control systems featuring ‘hardened’ automation technology from Siemens.

 

Control Engineering Europe

 

2010

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